Exploring the Feasibility of Swapping Program Counters with Linear-Feedback Shift Registers: Apossibility Affirmed!
Hear ye, hear ye! We've got some wild CPU news today, folks! Richard James Howe, a known figure in the tech world, has unveiled a fresh creation. This 16-bit CPU is a head-turner, crafted using VHDL for FPGA.
What sets this CPU apart is the substitution of the conventional program counter (PC) with a linear-feedback shift register (LFSR). As it turns out, an LFSR takes less transistors to build than an adder, making it quite the hardware-saving marvel!
Normally, the program counter in your CPU ticks over one notch at a time, pointing to the location of the next instruction to fetch and execute. When you swap out the program counter for an LFSR, it still does its job of directing the fetch and execution, but with a twist! Instead of a strict linear progression, the LFSR generates a pseudo-random sequence of addresses for the instructions to be scattered throughout your address space!
So now, the special sauce you need is a unique compiler, one which can arrange things so this pseudo-random address jumping business can work its magic. That, my friends, is what Richard's latest brainchild is all about!
Now, take this with a pinch of salt - it's all just a tad eccentric and meant for good ol' fashioned fun. This ain't the first time we've seen Richard's work - we've witnessed his Bit-Serial CPU and Forth System-On-Chip zoom by in recent years. Good to see he's still serving up surprises!
Many thanks to Richard James Howe for keeping us looped in on this latest whimsical development!
Fun fact: The LFSR generates a pseudo-random sequence of numbers, making it possible for instructions to be stored and executed in a non-linear fashion. This quirky approach to CPU design might seem out of left field, but it's primarily intended for educational or entertainment purposes, highlighting the flexibility of the LFSR in unusual applications within CPU design.
This innovative 16-bit CPU, designed by Richard James Howe, showcases a unique application of hardware science and technology, as it utilizes a linear-feedback shift register (LFSR) instead of a typical program counter. This LFSR, rather than following a linear sequence, generates a pseudo-random sequence of addresses, directing the CPU to execute instructions in an unconventional, non-linear manner.
Richard's design, while eccentric and primarily intended for educational or entertainment purposes, underscores the versatility of LFSRs in unorthodox applications within CPU design, demonstrating the ongoing exploration and evolution of FPGA-based hardware and digital science.
