Intel announces updates to its foundry roadmap, including the introduction of a new 18A-PT variant that facilitates 3D die stacking, as well as the enablement of the 14A process node.
In the rapidly evolving world of semiconductor technology, Intel and TSMC are making significant strides, with both companies planning to lead in the production of 1.4nm-class chips.
TSMC is set to take the lead with its A14 node, targeting mass production in 2028. The A14 node is expected to deliver around a 15% speed improvement, continuing the industry trend towards smaller and more efficient transistors. This positions TSMC as a frontrunner in cutting-edge semiconductor technology.
Meanwhile, Intel is planning to leapfrog its own previously planned 18A node and directly push its 14A process node, aiming for a technological breakthrough by adopting High-NA EUV lithography for the first time. This move could provide approximately 15%-20% better energy efficiency and chip density compared to the 18A node. Intel's 14A process is viewed as a key effort to surpass TSMC’s technology and reclaim foundry leadership by around 2027.
However, Intel's 14A node is still in strategic development, and the company has yet to finalize whether it will fully abandon the 18A rollout. The 18A process has already entered risk production phases, so Intel faces potential financial write-downs if it shifts focus sharply to 14A.
Samsung Foundry, another major player, has delayed its own 1.4nm node mass production to 2029, effectively ceding the lead in this node generation to TSMC and Intel in the near term.
In the meantime, Intel Foundry has made significant strides in other areas. The new Intel Foundry Chiplet Alliance enables customers to mix-and-match chiplets into their design based upon interoperable and validated designs. Intel's 16nm node, a version of its 22FFL node, has a tapeout in the fab now, and Intel Foundry has its first production 16nm tapeout in the fab as well.
Moreover, Intel's 18A process node is the first in the industry to be productized with both a PowerVia backside power delivery network and RibbonFET gate-all-around transistors. Intel's 14A process node will feature a second-generation version of PowerVia backside power delivery technology, called PowerDirect.
As for Intel's plans for its 10A (1nm-class) process node and any new progress on its Intel 3 node, these details have not been disclosed in the press release. However, Intel has shared early versions of the Process Design Kit for the 14A process node with lead customers.
In a strategic move, Intel has also announced a new partnership with Amkor for its 3D stacking Foveros implementation, which will be made available to foundry customers. The company showcased its broad portfolio of EDA, IP, and services driven by an ecosystem of industry stalwarts, like Synopsys and Cadence, at a recent event.
As the race for semiconductor dominance continues, Intel and TSMC are pushing the boundaries of technology, with TSMC currently set to lead the commercial mass production of 1.4nm-class chips in 2028, and Intel aiming to surpass this with its 14A node by 2027, though final decisions and deployment timelines remain uncertain. Samsung is trailing behind with a delayed 1.4nm node production planned for 2029.
Technology is at the forefront of the competition between Intel and TSMC, with TSMC currently planning to lead in the production of 1.4nm-class chips in 2028, and Intel aiming to surpass this with its 14A node by 2027, though Intel's 14A node is still in strategic development and final decisions and deployment timelines remain uncertain.
